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Home : Products & Services: Demos on Demand - Digital Signal Processing
 
Digital Signal Processing - Demos on Demand™

 
 
FEATURED DEMO
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Product Demo: Accelerating FPGA Designs with AccelDSP™ and System Generator for DSP™
Robert Anderson, Processing Solutions Group
This 30 minute video demonstration gives an overview of the DSP design tools offered by Xilinx. We begin in AccelDSP™ with a floating-point MATLAB algorithm, and generate a VHDL or Verilog model along with a test bench. Key steps reviewed are floating-to fixed-point conversion and design exploration which, through automation, result in an overall reduction in design cycle time. Also covered is System Generator for DSP™ which is based on Simulink. It contains a toolbox of about 100 IP blocks that can be used to build a system and then take that system through implementation into an FPGA. The video includes a demonstration of a 16 QAM (quadrature amplitude modulation) algorithm showing how part of the design can be done in AccelDSP and how that block can be incorporated in a larger System Generator design.
DSP SOLUTIONS
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Product Demo: System Generator for DSP
Jim Hwang, Sr. Manager, Vertical Products
This demo shows how System Generator for DSP—our high-level modeling environment for DSP data paths—yields performance and efficiency comparable to hand-crafted designs. Because of its tight integration with the Simulink® and MATLAB® tools from The Mathworks, FPGA designs are implemented in a familiar setting without concern for the underlying hardware details.
 
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Product Demo: Introduction to the DSP Video Starter Kit and Video Co-processing Kit
Sabine Lam, Mark Oliver
This demonstration on demand provides an overview of two new high-performance video processing kits from Xilinx.
The Video Starter Kit is fully integrated with Xilinx System Generator for DSP tool. The demonstration shows how designers unfamiliar with FPGAs can build high performance video processing systems using The MathWorks Simulink® tool and blocksets and verify those designs on Xilinx FPGAs. This kit features a video IO card that supports multiple formats including DVI, VGA, SDI, composite video, component video and S-video.
The Video Co-processing Kit for the Texas Instruments DM642 EVM is demonstrated along with the abstraction layer that is available for that kit. The demonstration discusses how a co-processing strategy could be used to optimize a video processing system and achieve increased system performance and reduced overall cost. The Video Co-processing Kit is developed for Xilinx by Spectrum Digital.
 
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Product Demo: Harnessing the power of the Virtex-4 Xtreme DSP Slice
Niall Battson, DSP Applications Engineer
In this engaging demonstration, DSP applications engineer Niall Battson, explains how to "Harness the power of the Virtex-4 Xtreme DSP Slice" to enable you to achieve 500MHz filter performance, significantly lower power consumption and efficiently implement your DSP designs.
 
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Whiteboard Presentation: Algorithm to Hardware in Sixty Minutes
Sean Gallagher, Senior DSP Specialist
Here are some tips on how to implement signal processing functions onto FPGAs. Moving signals
to baseband, filtering tricks, decimating and DFT implementation are all covered in this dynamic whiteboard session.
 
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Product Demo: FPGAs for Signal Processing
Dr. Chris Dick, Chief DSP Architect & Director of Signal Processing System Engineering
This Demo shows you how an FPGA device can be used for signal processing and provides an overview of the Xilinx DSP solution including the IP cores that are available as algorithms and
DSP software.
 
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Product Demo: Spectrum Channelization
Dr. Chris Dick, Chief DSP Architect & Director of Signal Processing System Engineering
This module explains spectrum channelization for wired and wireless applications using a number
of examples built using the Xilinx System Generator for DSP and the Xilinx DSP IP library.
 
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Product Demo: Designing QAM Demodulators
Dr. Chris Dick, Chief DSP Architect & Director of Signal Processing System Engineering
This compelling Demo shows the implementation of a QAM receiver including both synchronization and adaptive channel equalization.
 
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