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 FEATURED DEMO |
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Product Demo: Virtex™ 5 Power Estimation and Measurement Demonstration
Derek Curd, Senior Staff Applications Engineer, Advanced Products Division
XPE is a free, downloadable tool that enables engineers to quickly calculate power consumption projections based on their design’s parameters. It is available from the Power Central page on the Xilinx web site at www.xilinx.com/power
In this demonstration, we look at the steps required to create an accurate power estimate for Virtex-5 devices using the XPower Estimator (XPE) tool. We then demonstrate the low power consumption characteristics of Virtex-5 devices by taking actual measurements on an ML550 board, the preferred platform for making detailed power measurements. Finally, we compare our XPE results to the silicon measurements to determine the accuracy of our initial estimate. And we give you the tips and techniques you need to accurately estimate power for your own design.
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Product Demo: ISE Design Tools
Introduction: Balaji Thirumalai, ISE Solutions Marketing
Performance: Design Flow & Tools: Frederic Rivoallon, Synthesis Methodology Manager
SmartCompile Technology: Brian Philofsky, Software Technical Marketing Engineer
View the new ISE logic design tools suite in action! You will see "What's New in ISE", including design flow and tools demos which show the power and performance of these robust tools. Additionally, you will see a demonstration of the new Xilinx SmartCompile Technology. SmartCompile is an industry-unique combination of capabilities to solve designers' number one design challenge - timing closure. ISE integrates everything into a complete logic design environment for all leading Xilinx FPGA and CPLD products, including the Virtex™-5 multi-platform FPGAs. Easy-to-use, built-in tools and wizards make I/O assignment, power analysis, timing-driven design closure, and HDL simulation quick and intuitive. See it now!
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Product Demo: Improving
Design Performance with PlanAhead
Brian Jackson, Design
Software Division, Product Marketing Manager
This brief presentation offers an overview of
the PlanAhead Design Analysis Tool, highlighting
the latest features. This video product demonstration
includes an explanation
of the new ExploreAhead technology and how it can help you get maximum
performance from your design. The overall goal of this product demonstration
is to provide you with an understanding of how PlanAhead can help
you achieve optimal quality of results from your design while reducing
your overall design time. This presentation also explains how viewers
can download a free 30-day evaluation of PlanAhead. |
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Product Demo: Using
PlanAhead for Partial Reconfiguration
Brian Jackson, Design
Software Division, Product Marketing Manager
This presentation offers an overview of the Xilinx solution for Partial
Reconfiguration. This presentation describes the current Xilinx solution
and software availability. After a brief explanation of the new
features in PlanAhead 8.1 specific to Partial Reconfiguration, you’ll
see a demonstration of the implementation flow for Partial Reconfiguration. |
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Product Demo: ChipScope Pro Serial IO Tool Kit
Brent Przybus, Sr. Product Marketing Manager
In this demonstration you will see the new ChipScope ProTM Serial IO Tool Kit in action. This is a new addition to the ChipScope Pro suite of tools, and is specifically designed to evaluate and measure multi-gigabit serial transceivers in Xilinx Virtex TM FPGA products. The new Xilinx ChipScope™ Pro Serial IO Toolkit is an optional add-on to the popular ChipScope Pro verification toolset for use with Virtex-4 FX and Virtex-5 LXT/SXT devices which will significantly shorten debug and setup for serial IO designs. |
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Product Demo: ChipScope™ Pro and Agilent Technologies -
Advanced Debug Solutions for Xilinx FPGAs
Brent Przybus, Sr. Product Marketing Manager
Xilinx has partnered with Agilent to combine the flexibility of on-chip debug with the advanced capabilities available in Agilent’s
Logic Analyzers to address debug and verification of complex FPGA systems.This demo shows the debug and verification of a Virtex design using Agilent's FPGA Dynamic Probe.
You’ll see board setup, adding an ATC2 core to a design, configuration of the Xilinx FPGA, and set up of the Logic Analyzer to start debugging. |
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Product Demo: ChipScope Pro-Debug & Verification of a Virtex Design
Brent Przybus, Advanced Products Division, Product Marketing Mgr.
View this demo to see how ChipScope Pro tools can be used to shorten the debug and verification phase
of a Xilinx FPGA design. This demonstration will use ChipScope ILA and VIO cores to gain on-chip
visibly into a Xilinx Virtex FPGA design. See advanced capabilities and features that allow the user to
optimize on-chip resources. More integrated IP, high performance, and advanced interfaces result
in a more challenging debug and verification process. See how Xilinx's ChipScope Pro tools slash debug
and verification times, shortening the overall FPGA design time. |
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Product Demo: ChipScope Pro—Accelerating On-chip Debug & Verification
Brent Przybus, Advanced Products Division, Product Marketing Mgr.
This in-depth demo shows how ChipScope Pro, the real-time debug and verification tool for Xilinx
FPGAs, enables on-chip debug at or near operating system speed. The size, speed, and board requirements
of today's FPGAs make it nearly impossible to debug designs using traditional logic analysis methods.
Flip-chip and ball grid array packaging do not have exposed leads that can be physically probed. Xilinx
has the solution: ChipScope Pro. |
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